1976-1978, Bachelors in electrical engineering, S P University, India, M.S.E.E., Rutgers University,
Fairleigh Dickinson University, Degree incomplete, Graduate courses include computer engineering, software and integrated circuits
A computer and digital system design and development engineer. Intellectual property and patent development professional. Past areas of endeavor include, development of computer and Digital system architecture and circuit design. Extensive intellectual property and patent related work related to development of computer and power engineering systems. High performance processor architecture and design. SOC design and methodologies. Signal integrity issues. Dedicated real time and embedded computing system design utilizing advanced CISC and RISC microprocessors. Digital signal processor (DSP) system architecture, design and integration. Aircraft and automobile electrical systems. Electrical power systems. Conducted extensive research studies in many leading edge technologies. Project management and customer interface. Member IEEE. Membership in the official WHO’S WHO of American inventors. Possesses strong interpersonal and communication skills. U.S.citizen, DOD secret clearance.
Developed high performance cache less computer system for marketing to the computer industry and filed a patent application. The goal of the new system was to overcome the limitations of existing computer systems. Currently pursuing further development of the architecture and prototype of the innovative computer system to commercialize the invention.
Affiliated with IEEE consultant network and actively participated in intellectual property presentations and professional development of engineers.
As a member of avionics and aircraft systems group participated in different projects for developing and improving aircraft avionics systems.
Actively involved in developing aircraft electrical power systems to achieve higher efficiency and greater reliability.
Developed innovative approaches to automobile electrical systems to improve efficiency and reliability. Participated in developing dedicated systems to improve automobile safety.
Developed innovative approaches to achieve more reliable and safe electrical power systems.
Developed new concepts for electrical generators and motors to overcome limitations and problems of current technology. Filed patents for state of the art electrical generators and motors.
Performed design and performance analysis for Internet router and switching environment.
As part of independent research and development effort, conducted extensive research in IC system-on-a-chip design and technologies. Investigated application of physically knowledgeable synthesis and methodologies-tool flows to resolve physical design problems early in the design cycle.
As a team leader participated in many projects involving advanced high performance processors. Designed and developed custom CPU architecture and implemented high-speed hardware logic for advanced aerospace processors. Designed and developed digital signal processor (DSP) based system architecture and detailed logic circuit for radar signal processing systems.
As a member of System-on-a-chip design technology group, developed Verilog and VHDL coding standards and methodologies for semiconductor reuse. System integration and design flows to achieve time to market goals.
Consulted on Intellectual Property (IP) certification and acceptance procedures. Created rapid integration procedures to integrate reusable IP modules.
Resolved data and flow management issues for large SOC integration effort
Participated in a design effort to develop 1.2 million gate count MPEG2 decoder VLSI IC with complex audio and video algorithms. Defined I/o interface and inter block connectivity. Resolved rtl code issues. Performed code coverage analysis. Corrected synthesis and timing problems.
Group leader for an effort to develop Universal Serial Bus decoder IP. Developed detailed specifications and implemented hardware architecture in rtl code. Prepared functional test plan. Designed simulation environment and performed functional and gate level design verification.
Managed and implemented System level simulation and verification effort architecture for a 400MHZ ASIC intended for processor - PCI bus application on a PC workstation
Designed and developed large and medium size state machines under VERILOG and VHDL environment to implement complex logic and multi processor control functions.
Resolved metastability and pipelining issues to obtain desired critical path delays for 100MHZ systems to achieve optimum performance in limited gate count and die size FPGAs.
Studied reliability mechanisms and conducted power and performance tradeoff analysis to assist design and layout decisions for FPGAs.
Project engineer and group leader, designed micro controller based fusing and control system circuits and firmware. Procured custom micro controller from TI. Resolved signal integrity issues. Performed VHDL simulation and design verification.
Defined system level architecture for VHISC devices using VHDL description methodologies and formats.
Prepared proposals and defined concepts for integrated DSP and CISC based control and data computation computer for high performance and high density applications.
Developed architecture, designed logic circuits and defined interprocessor communication protocols for MPP and distributed parallel processing systems for computation intensive applications. Designed multi processor architecture and software concepts for high speed computing using dedicated chipset and implemented DSP based multi processing systems for real time signal processing and Image processing applications. Conducted requirements analysis and software design for DSP based systems.
As a group leader provided leadership and made technical contribution to a special projects group engaged in specific applications of RISC and CISC processors to advanced computation intensive, digital signal processing and complex algorithm oriented applications.
Conducted research studies in the applications of superconductivity to advanced aerospace applications and multi processing architectures for neural networks implemented on intelligent processor clusters.
Analyzed VLSI architectures for advanced avionics and ground system applications. Reviewed and performed application analysis on dedicated software and related tools. Managed subcontracts. Handled research publications for company IRAD.
Developed hardware and software for advanced digital tracker. Conducted studies in digital coding algorithms and investigated VLSI solutions.
Designed and developed a DMA oriented, real time multi processing computing system to implement dedicated mathematical algorithms. Used state-of-the art in-circuit emulation techniques for microprocessor based systems. Designed real time software for signal processing and control functions.
2001-present, developed advanced high performance computer systems for marketing to computer indistry
1999-2000, Mentor Graphics, Texas
1997-1999, Cadence Design Systems, Texas
1996, Texas Instruments, Texas
1995-1996, Bei Defense System, Texas, Group Leader
1992-1994, Associated With IEEE Consultant’s Network And Worked For Various Companies.
1987-1991, General Dynamics, Texas, Group Leader
1980-1986, Martin Marietta Aerospace, Florida, Design And Project Engineer
1978-1980, Singer Company, New Jersey, Design Engineer
Johnson And Johnson, New Jersey, Project Engineer
Available upon request
Available upon request
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